Capacitance Comparison Method

each pixel slowly discharges the external capacitor, Cext. If the 2K*2K pixels of the detector are exposed to a high photon flux and several frames are read out and reset, the charge to repeatedly reset the complete array will discharge Cext, generating a voltage drop across Cext large enough to be accurately measured. Since the voltage drop AVext on Cext and the signals of each pixel ViJ are known, the nodal capacitance C0 and thus the conversion gain C0/e can be calculated as shown in Eq. (2).

nframes 2048 2048

Figure 1. Hardware setup for capacitance comparison method for the measurement of the conversion gain.

A capacitance of 9.26 |F was used for Cext. It is much larger than the sum of the capacitance of all the cables and other stray capacitances. The capacitances of these components may, therefore, be neglected. Low leakage current capacitors such as foil should be used for Cext. Ceramic capacitors should be avoided. Filtering, antistatic and protection circuitry on Vreset should be removed or modified if they have large leakage currents. For example, the antistatic protection Zener diode on our preamplifier board next to the focal plane was removed because of its large leakage current. In addition, the ceramic capacitor of the lowpass filter for Vreset was replaced by a foil capacitor. No modification is needed for Dsub. Leakage currents do not affect Dsub as it remains connected to the bias voltage.

An example of the detector signal is shown in the oscilloscope traces in Fig. 2. The detector is operated in read-reset-read mode using line reset. In the left image of Figure 2, the detector signal VniJ, the nth frame of pixel (i,j), is the difference between the voltages at the end of the integration ramp and the beginning of the next ramp immediately after applying the reset voltage, which recharges the nodal capacitor of the detector pixel C0. After charging the external capacitor Cext and opening the relay, the charge to reset C0 is provided by Cext. Consequently, the DC level of the detector signal slowly decreases (see the right side trace of Fig. 2) as the external capacitor Cext is discharged. With increasing photon flux the discharge rate of Cext increases.

500ns/div 10s/div

Figure 2. Oscilloscope traces of the detector signal while applying the capacitance comparison method. (left) Detector signal in read-reset-read mode using line reset. Time resolution is 500 |as/division. All 64 pixels of a detector row are read at the end of the integration ramp, the row is reset and read again at the beginning of the next integration ramp. Vn,;j is the detector signal of the n"1 frame of pixel (i,j). (right) The same detector signal taken with time resolution of 10 s/division covering 50 frames. After the relay opens the DC level of the detector signal decreases due to the discharge of the external capacitor Cext.

500ns/div 10s/div

Figure 2. Oscilloscope traces of the detector signal while applying the capacitance comparison method. (left) Detector signal in read-reset-read mode using line reset. Time resolution is 500 |as/division. All 64 pixels of a detector row are read at the end of the integration ramp, the row is reset and read again at the beginning of the next integration ramp. Vn,;j is the detector signal of the n"1 frame of pixel (i,j). (right) The same detector signal taken with time resolution of 10 s/division covering 50 frames. After the relay opens the DC level of the detector signal decreases due to the discharge of the external capacitor Cext.

The detector signal and its change in DC level can be observed by using the normal data acquisition chain operating the detector in the read-reset-read mode. By simply recording the raw data values before and after reset rather than the differences, as is normally done in double correlated sampling, both the pixel intensities and the DC level of the detector signal can be calculated. This is illustrated in Fig. 3, which shows a small part of the array. The bright stripes are the pixels of the row read at the end of the detector integration. The dark stripes are pixels read immediately after reset and are the voltage Vext on the external capacitor Cext. The difference is the detector signal.

Figure 3. Read-Reset-Read: Bright stripes are pixels of a row read at the end of the integration. Dark stripes are pixels read immediately after reset and are the voltage Vext on the external capacitor Cext.

Figure 4. Drift of voltage Vext across the external capacitor Cext versus the number of detector integration. AVext=58.6 ADU/frame.

Depending on the photon flux to which the detector is exposed, the DC level of the detector signal drops at a proportional rate AVext /frame in ADU's per frame as shown in Fig. 4. The number of frames can be selected to be sufficiently large to measure the voltage drop per frame AVext with the desired accuracy. This voltage drop is measured at different photon flux levels and plotted in Fig. 5 versus the sum of the detector signal for the corresponding flux level. (Note that each datum in Fig. 5 comes from one slope of the measurements shown in Fig. 4.)

Figure 5. Voltage drop across the external capacitor Vext versus the sum of the voltages of all detector pixels (total detector signal) for the corresponding flux level. The total detector signal is changed by increasing the photon flux on the detector. The slope of the least square fit is the ratio of the nodal capacitance and the external capacitance C0/Cext .

Figure 5. Voltage drop across the external capacitor Vext versus the sum of the voltages of all detector pixels (total detector signal) for the corresponding flux level. The total detector signal is changed by increasing the photon flux on the detector. The slope of the least square fit is the ratio of the nodal capacitance and the external capacitance C0/Cext .

"5 4000

Histogram of Fe55 with Si-PiN Hovmii-2RG HyViSI array

Histogram of Fe55 with Si-PiN Hovmii-2RG HyViSI array

"5 4000

Literature Fe56:

■11'1' ■

1620 e/event

-

\Capadty comparison:

Shot rotie:

Co»13.9tF

j ',00=28.5 fF

-

1 1

I

Signal [e]

2000 3000

Signal [e]

Figure 6. Histogram of HAWAII-2RG Si-PIN HyViSI array exposed to Fe55 X-ray source.

The same data set is plotted with nodal capacitances derived from capacitance comparison method (solid histogram) and the shot noise method (dashed histogram). Literature value is indicated as a vertical line.

As shown by Eq. (2), the slope of AVext plotted versus the total detector signal ^V j is equal to the ratio of the nodal capacitance and the external capacitance, C0/Cext. The external capacitor is 9.26 ^F. Using the slopes from Fig. 5, the nodal capacitances of two different Xc=2.5 ^m HgCdTe arrays (HAWAII-2RG #13, HAWAII-2RG #66) and one Si-PIN array (HyViSI) hybridized to HAWAII-2RG multiplexers can be calculated.

The discrepancy of nodal capacitances C0 determined by the capacitance comparison and the shot noise method is substantial (> 20% for HgCdTe and more than a factor of two for Si-PIN arrays) as can be seen in Table 1.

Table 1. Comparison of nodal capacitances of CMOS hybrid arrays determined by capacitance comparison and shot noise method.

Conversion gain

Co

Co

Device

capacitance comparison

capacitance comparison

shot noise

[e-/mV]

[fF]

[fF]

Xc=2.5 |am HgCdTe HAWAII -2RG #13

201

33.5

40.9

Xc=2.5 |am HgCdTe HAWAII -2RG #66

164

27.4

38.1

Si-PIN HyViSI

86 8

13.9

28.5

HAWAII-2RG

Nodal capacitances obtained with the capacitance comparison method (Table 1) yields quantum efficiency for the HgCdTe HAWAII-2RG array #13 in K-band of 86% instead of 105%, the value derived with the shot noise method. The shot noise method does not achieve plausible quantum efficiency using conversion gains derived from the standard "noise squared versus signal" technique.

In an effort to compare and validate the two methods of deriving conversion gain we used the Ka line of Fe55 which generates a well known number of electrons per absorbed x-ray photon and has been in use for many years to calibrate the conversion gain of optical CCDs [2]. Unfortunately, the Fe55 method cannot be applied to the HgCdTe double layer planar heterostructures of infrared arrays. The HgCdTe diode arrays of infrared detectors are grown by molecular beam epitaxy on a CdZnTe substrate which absorbs the x-ray rays of the Fe55 source and blocks them before they reach the depletion region of the infrared diodes. The CdZnTe substrates of HgCdTe arrays can be removed by chemical etching. For this type of HgCdTe arrays the Fe55 method can be applied, but ESO does not yet have such a device. For the Si-PIN diode array, however, Fe55 calibration is applicable. A histogram showing the number of electrons generated by the absorption of one x-ray photon is shown in Fig. 6. The solid curve represents the histogram generated using the nodal capacitance Co determined by the capacitance comparison method; the dashed curve shows the histogram of the same data set but using the nodal capacitance determined by the standard photon transfer curve technique. The accepted value [1] used in calibrating CCDs is shown as a vertical line in Fig. 6. (Ka x-rays generate an average of 1620 electrons in silicon). It is evident that the capacitance comparison method is consistent with the Fe55 value cited in literature. The limitations of the applicability of the shot noise method using "noise squared versus signal" have to be investigated and a more thorough interpretation of the method is required.

The Fe55 method can also be applied to InSb detectors which do not have a detector substrate. First measurements yield a value of 2500 electrons per absorbed Ka x-ray photon. Possibly, the Fe55 method will also be applicable to HgCdTe arrays, if their substrate is removed. Further investigation in this area is needed.

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