The CCD is soldered to the top section of a Sensor Head Board (SHB) and mounted closely (20 ^m) via 3 hard-points to the end of the fiber bundle. The upper end of the SHB is connected via a flexible 7.5 cm connection to the lower end that contains an OP 16 JFET pre-amplifier and protection circuits. Both ends are widely thermally decoupled.
The readout electronics are concentrated about 60 cm away in the Electronics Assembly (EA) on a readout board containing the signal chain, the clock drivers and an A1020B FPGA based digital control and interface unit. Most electronic parts were selected according to a preferred parts list from NASA. We used OP16, an AD585 S/H and a 12 bit AD7672 ADC. With such limited converter resolution (30 e_/DU), the digitizing noise became the dominant noise source.
We finally achieved the following operation specifications:
• Pixel readout timing: 16 ^s/pixel
• Readout noise (CCD @ 193 K): 12.6 e" r.m.s.
The data transmission capacity between Huygens and Cassini was limited to 8 kbit/s. As a consequence, a 15:1 compression was applied by using a DCT hardware compressor in addition to an adaptive pseudo-square rooting.
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