Chip and Pixel Sizes

The size of a device is limited by wafer size (~6 in. is typical for specialist CCD manufacturers), lithography, and yield. Device size is increasing, with 4Kx4K format becoming available from several manufacturers. For large cost-effective mosaics, special approaches can be adopted to increase yield, e.g., subdividing a device into functional units and integrating within the package, such as illustrated in Fig. 30. The requirement for a 5Kx5K monolithic device is that there be no fatal defects across the whole area. It is possible to make 5Kx1.25K (K = 1024) units on a wafer, select them by probing, and then use special packaging techniques to construct a 5Kx5K unit device with minimal gaps between units. The unit components could be 1.25K, 2.5K, 3.75K, or 5K in height depending on the yield of each wafer.

The size of a pixel is limited by issues of lithography, process, and performance, e.g., full-well capacity. Pixel size is decreasing, with ~10 ^m available from several manufacturers. In many cases, lithography and process developments allow smaller features to be made. Four-phase pixels may become more common in order to help maintain full-well capacity as pixels shrink in size.

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