Chip Layout

Three years ago ST Microelectronics began manufacturing SPAD arrays with different architectures. Currently 5^5 arrays (with each SPAD having active area of 40 ^m and pitch between adjacent pixels of 240 ^m) are produced. Furthermore, technology improvements in terms of quality, QE and cross-talk reduction are under study and development. Figure 3 shows the mask of a 5x5 40 ^m SPAD array and the SEM image.

Spad Array 5x5
Figure 3. (left)Mask of a 5x5 40 ^m SPAD array, and (right) a SEM image.

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