The DC gain test measures the low frequency, small-signal gain on each on-chip charge-to-voltage amplifier. Each amplifier is, in turn, biased up and the reset drain input is swept from 0.0 to the Output Drain (OD) bias (see Fig. 3). The CCD output can be biased using either a passive (resistive) load or a constant current source, with the latter being preferred on most automated test stations.
The small signal gain, i.e. Gain = AVOS/AVRD, is calculated at each reset drain setting and then the resultant gain curve is graphed, an example of which is shown in Fig. 4. The features of most interest on the gain curve are the recommended operating points for reset drain with respect to the reset gate cutoff point, Vrg-cot in Fig. 4, and the general flatness of the gain curve over the voltage operating range of the CCD output.
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