Detector Principles and Format

Differing from other CCD concepts, both sides of the pnCCD are depleted, thus forming a potential minimum for electrons within the detector substrate. Figure 1 shows a schematic cross-section of a pnCCD along a transfer channel. By increasing the voltage of the rear contact, the potential minimum is shifted close to the registers on the frontside of the device, forming well defined potential wells for collecting signal electrons in a depth of approximately 7 ^m. Since there are no insensitive gaps between the registers, the device exhibits a fill factor of 100%. The unstructured and homogeneously implanted rear contact of the device acts as the radiation entrance window. The advantages of this concept of full wafer depletion are:

• sensitivity of the detector for ionizing radiation over its entire volume of 450 ^m

• a very thin, uniform radiation entrance window with a high detection efficiency for short penetrating radiation, which provides a possibility for further coating of either light absorbing layers for X-ray applications or appropriate Anti-Reflecting (AR) layers for applications in the Visible (VIS) and Near-Infrared (NIR) spectral regions • an electric field distribution through the detector volume, which reaches its maximum value close to the radiation entrance window and thus reduces the spatial widening of charge clouds generated close to the detector entrance window.

Figure 1. A schematic cross section of the fully depleted pnCCD along one transfer channel. The radiation entrance window and the transfer registers on opposite wafer sides are realized by p+ implantations in n-type silicon. After a signal charge packet is transferred to the readout anode, it is amplified by an on-chip JFET, which in turn is connected by wire bonds to an amplifying and shaping chip for further amplification.

Figure 1. A schematic cross section of the fully depleted pnCCD along one transfer channel. The radiation entrance window and the transfer registers on opposite wafer sides are realized by p+ implantations in n-type silicon. After a signal charge packet is transferred to the readout anode, it is amplified by an on-chip JFET, which in turn is connected by wire bonds to an amplifying and shaping chip for further amplification.

Applying clocked periodic voltages to the registers transfers stored signal charges to the readout anode at the end of the transfer channel. Each anode is equipped with an integrated JFET transistor for on-chip amplification. JFETs inherently exhibit a very low 1/f noise and can be operated with low current for low noise applications [2]. The sources of each JFET are wire bonded to a multi-channel VLSI-chip for further amplification and signal filtering. A description of this readout chip is given in Sec. 2.3.

To allow high speed operations while maintaining imaging capabilities, the CCD is designed for operation in split-frame-transfer mode. Figure 2 shows the layout of the detector and the readout chips. The imaging area of 13.5x13.5 mm2, comprising 264x264 pixels with a geometry of 51 ^m2, is divided in half for readout. Each half image is transferred to its storage section on opposite sides of the detector, which are shielded for incident radiation. During the readout of both storage areas simultaneously, the entire imaging area is sensitive for incident photons. This way, the time resolution of the CCD is given by the time needed to readout and amplify the storage area, comprising half the pixels of the full imaging area. For a readout time of 7 ^s per line, a frame repetition rate of nearly 1100 Hz was achieved with an electronic noise floor of less than 2.3 electrons ENC at an operating temperature of -55°C.

Figure 2. Schematic layout of a split frame-transfer pnCCD with an imaging area of 13.5x13.5 mm2, containing 264x264 pixels with a size of 51 ^m2. Having up to four serial readout nodes on each side, thus totaling in eight readout nodes, a frame repetition rate of nearly 1100 Hz was achieved with an overall electronic noise contribution of slightly more than two electrons ENC at an operating temperature of -55°C.

Figure 2. Schematic layout of a split frame-transfer pnCCD with an imaging area of 13.5x13.5 mm2, containing 264x264 pixels with a size of 51 ^m2. Having up to four serial readout nodes on each side, thus totaling in eight readout nodes, a frame repetition rate of nearly 1100 Hz was achieved with an overall electronic noise contribution of slightly more than two electrons ENC at an operating temperature of -55°C.

The probability of out-of-time events, which may lead to a smearing of the obtained image, is given by the ratio of the total transfer time of the image into the storage area relative to the total readout time of the storage areas. At 1100 frames per second, the entire readout time is approximately 900 ^s whereas the transfer time for a half image into its storage area is in the order of 25 ^s, resulting in an out-of-time probability of less than 3%. Due to a charge transfer efficiency of better than 0.99999 (i.e. a charge transfer inefficiency of less than 10-5), the total loss of signal charge is less than 0.15% for rows most distant from the readout anode.

2.2 Optical Properties

The detection efficiency of back-illuminated CCDs for short penetrating radiation in the UV and soft X-ray region is mainly determined by the electric field properties close to the detector entrance window and the reflectivity of the detector surface. The radiation entrance window of pnCCDs is formed by a homogeneous, ultra-shallow p+ implantation (see Fig. 1). The pn-junction is located at a depth of approximately 40 nm, which is also the location of the highest electrical field [3]. The internal quantum efficiency of a detector in the optical region describes the probability of the detection of generated signal charges, once an incident photon has passed the covering layers of the detector. Figure 3 shows the internal quantum efficiency from the vacuum UV to the near IR region. While the absorption length of silicon changes by more than four decades to values below 5 nm, the internal quantum efficiency remains at nearly one within the entire spectral region between 300 nm and 950 nm [4]. Below 300 nm the quantum efficiency increases due to the onset of secondary ionization processes by the primary generated photoelectron [5]. In the near IR region, a decrease is observed as expected when radiation transverses the 300 ^m thick detector material.

Figure 3. Internal quantum efficiency in the wavelength range from 150 nm to 1000 nm at room temperature. Below 300 nm a quantum yield is achieved. The large sensitive thickness of 300 ^m allows for a high efficiency in the near IR region.

Based on detector internal quantum efficiency, one can calculate the expected external quantum efficiencies for various anti-reflecting coatings and tailor for the desired application. With an antireflection coating of SiO2 and Si3N4 layers, an overall high optical respectively enhanced "red" and near IR responsitivity can be achieved as shown in Fig. 4. In the first case, the efficiency remains greater than 80% within the entire optical region with a maximum at the position of the sodium line at 580 nm. In the other case, the quantum efficiency remains higher than 90% from 750 nm up to 1000 nm. The calculations were confirmed by measurements, as indicated by the diamonds in Fig. 4. The entrance window of this detector was optimized for a CsI(Tl) scintillator readout at 548 nm. The calculations and measurements shown were made for room temperature, so figures at longer wavelengths will fall slightly due to energy band broadening of silicon at lower temperatures.

1 -

400 500 600 700 «00 900 1000

Wovelinqlfi [nm]

Figure 4. Measured (diamonds) and calculated quantum efficiencies for a pnCCD with different kinds of AR coatings. The diamonds represent measurements of a detector, whose sensitivity was optimized for a CsI(Tl) scintillator readout at 548 nm. The calculation, based on the knowledge of internal quantum efficiency and the exact layer stack, represent the measurements very well. The other curves show calculations for entrance windows optimized for the 580 nm sodium line respectively to exhibit a very high QE in the NIR region.

2.3 Detector Readout

The pnCCD, as described in this paper, is a channel-parallel type of CCD [6], meaning all channels are read out in parallel thus omitting any serial transfer registers. For the readout of the CCD channels, a multi-channel readout ASIC is used. This CAMEX (CMOS Amplifier and MultiplEX) chip allows amplification and shaping of all of its 132 channels in parallel. For reading out the 2^264 channels of the CCD, two of these CAMEX chips are adjacently placed on each side of the detector and operated in parallel (see Fig. 2). Accompanying each of the 132 internal amplifiers of the CAMEX chips is a current source to operate the CCD on-chip FET of each channel in a source follower mode. The current source and the most sensitive first amplification stage are realized with JFET technology; while all other sections of the CAMEX chip are build in standard CMOS technology. This means that the electronic noise contribution of the CAMEX chip is less than one electron.

Signal filtering is performed by Multi-Correlated Double Sampling (MCDS). By freely programmable internal registers, any value between 1-fold and 8-fold correlated sampling is selectable, allowing a tradeoff for either optimized noise behavior or high-speed performance. Different gain selections also allow for an optimum match of the dynamic range.

The pipelined signal processing path of the CAMEX chip enables an output multiplexing of amplified signals to the output nodes and, at the same time, the amplification and filtering of the following line of the CCD. Additionally, the CAMEX allows for operation by either multiplexing all 132 channels to one single readout node, or by multiplexing half of its channels (in our case 66 channels) onto two readout nodes in parallel to overcome speed limitations of subsequent analog electronic components. This highly parallelized signal processing allows for very short readout times.

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