General Architecture

the oscillation, but in this case the phase drivers can't be simple switches, but have to be amplifiers. Figure 2 shows the effect of controlled drive with a parasitic inductance of 10 nH. Finally, driving CCD220 parallel phases with sine waves is also possible due to the symmetric 2 phase structure and would have the advantage of minimizing clock induced charge [6].

10-1 8-

\

CD

a_

-4-6-

1

1

1

0.0 50 On 100.0(1 160.0n 200.0n 250.0(1 300 Or time (s)

0.0 50 On 100.0(1 160.0n 200.0n 250.0(1 300 Or time (s)

Figure 1. Effect of 4 nH parasitic inductance on the parallel clocks. Lowest amplitude signals refer to the drive waveform,the highest waveform refer to the clock signal (the buffer has a gain of 2).

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