The Aacas Image Acquisition System Archetecture

The AACAS's image acquisition system [4] electronics (see Fig. 1) is typically comprised of four boards as shown in Fig. 2: (1) Embedded processor board, (2) Driver clock board, (3) Analog (bias) boards, (4) A/D and data acquisition board. All of the electronics boards are inserted into a 6U pseudo-VME backplane.

Figure 1. The AACAS image acquisition system architecture.

The standard VME backplane does not meet our AACAS controller requirements, because standard VME backplane does not support more than five types of power supply pins. The width of a signal trace of a standard VME backplane is only about 10 mil (0.25 mm). If the signal pins in the standard VME backplane are used for power, it could become overheated. Thus we designed a 6U pseudo-VME backplane with a 6-layer PCB and a standard 96 Pin connector. 10 power pins are available within. The power supply wire in the pseudo-VME backplane was chosen to be greater than 40 mil (1 mm). Individual layers are allocated for the most important DC power supplies, such as +/-5 V and +/-15 V. We carefully isolated the analog ground plane from the digital ground in the pseudo-VME backplane

The embedded processor board produces all of the AACAS image acquisition system signals, such as clocks and control signals. The clock driver board can produce 8 horizontal and 8 vertical clocks. The clock amplitudes, which are provided by 12-bit DACs, are adjustable in the range of +/-12V. There are sixteen DC analog biases on an analog (bias) board. Each output voltage is provided by a 12-bit DAC and is adjustable in the range of +/-15 V or +/-30 V.

All the voltages of the clock levels and biases are monitored by individual 12-bit ADCs. If any voltage failure is detected, the system protection procedure is executed and the power is cut off.

Figure 2. The AACAS image acquisition system.

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