The Remote Controller Interface

The remote unit is completely 'passive' in that no computing power has been implemented to reduce the clock/interference jitter on the system to a minimum.

Figure 2. A single FPGA (Glue Logic chip) allows remote interfacing with the PMC/PCI set of host computer interfaces. A specific remote unit can be constructed around this embedded logic only by adding the specific analog functions required.

The central 'core' of this system is a Glue Logic chip that implements all the logic functions needed to drive a set of general-purpose analog boards customized for a given detector on an FPGA (Xilink Spartan series), i.e.:

• handling of a command/data/telemetry link to the PCI/PMC interface board,

• reformatting of detector clocks coming from the PCI/PMC interface board (8+8 programmable clock lines plus 8 pixel processing lines ),

• handling of video channel data-flow (up to 4^4 16 bit channels),

• handling of serial DACs control lines for BIAS/CLOCK programming,

• handling of serial ADCs control lines for Telemetry acquisition, and

• handling of services (temperature and shutter control).

In our specific implementation, the basic remote unit has been mounted in a VME format board allowing compatibility with existing analog boards. Different implementations can be also imagined, for example a single, compact, remote unit where the Glue Logic chip is directly embedded with the analog electronics.

The system is, in this way, customizable for a given application and/or detector focal plane, in that only the insertion of a specific set of analog boards is needed to configure it.

The requirement to expand the system with more complex control architecture (detector mosaics, multiple service cameras, etc.) has been satisfied by making use of host-computers. Figure 3 shows simple architecture based on PCI interface, where a common synchronization line driven by a master interface allows the building of a large system with no dedicated hardware other than the simple insertion of extra boards. The same architecture and configuration is valid for PMC interfaces.

Figure 3. Expansion tree for the system based on a common synchronization line handled by a master host-computer interface.

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