CCD operation

The simplest and very understandable analogy for the operation of a CCD is also one that has been used numerous times for this purpose (Janesick & Blouke, 1987). This is the "water bucket" idea in which buckets represent pixels on the CCD array, and a rainstorm provides the incoming photons (rain drops). Imagine a field covered with buckets aligned neatly in rows and columns throughout the entirety of the area (Figure 2.1). After the rainstorm (CCD integration), each bucket is transferred in turn and metered to determine the amount of water collected. A written record (final CCD image) of the amount of water in each bucket will thus provide a two-dimensional record of the rainfall within the field.

Referring to the actual mechanisms at work within a CCD, we start with the method of charge generation within a pixel: the photoelectric effect.1 Incoming photons strike the silicon within a pixel and are easily absorbed if

Fig. 2.1. CCDs can be likened to an array of buckets that are placed in a field and collect water during a rainstorm. After the storm, each bucket is moved along conveyor belts until it reaches a metering station. The water collected in each field bucket is then emptied into the metering bucket within which it can be measured. From Janesick & Blouke (1987).

Fig. 2.1. CCDs can be likened to an array of buckets that are placed in a field and collect water during a rainstorm. After the storm, each bucket is moved along conveyor belts until it reaches a metering station. The water collected in each field bucket is then emptied into the metering bucket within which it can be measured. From Janesick & Blouke (1987).

1 Albert Einstein received his Nobel Prize mainly for his work on the photoelectric effect, not, as many think, for relativity.

they possess the correct wavelength (energy). Silicon has a band gap energy of 1.14 electron volts (eV), and so it easily absorbs light of energy 1.1 to 4eV (11 000 to 3000 A).1 Photon absorption causes the silicon to give up a valence electron and move it into the conduction band. Photons of energy 1.1 eV to near 4 or so eV generate single electron-hole pairs, whereas those of higher energy produce multiple pairs (see Section 2.2.8 and Chapter 7). Left to themselves, these conduction band electrons would recombine back into the valence level within approximately 100 microseconds. Silicon has a useful photoelectric effect range of 1.1 to about 10 eV, which covers the near-IR to soft X-ray region (Rieke, 1994). Above and below these limits, the CCD material appears transparent to the incoming photons.

Once electrons have been freed to the conduction band of the silicon, they must be collected and held in place until readout occurs. The details of the actual construction of each pixel within a CCD, that is, the formation of the MIS capacitor with its doped silicon, layers of silicon dioxide, etc., are beyond the scope of this book (Eccles, Sim, & Tritton, 1983; Janesick & Elliott, 1992), but suffice it to say that each pixel has a structure allowing applied voltages to be placed on subpixel sized electrodes called gates. These gate structures provide each pixel with the ability to collect the freed electrons and hold them in a potential well until the end of the exposure. In a typical arrangement, each pixel has associated with it three gates, each of which can be set to a different voltage potential. The voltages are controlled by clock circuits with every third gate connected to the same clock. Figure 2.2 illustrates this clocking scheme for a typical three-phase device.

We note in Figure 2.2 that, when an exposure ends, the clock voltages are manipulated such that the electrons that have been collected and held in each pixel's +10 volt potential well by clock voltage V3 can now be shifted within the device. Note that electrons created anywhere within the pixel during the exposure (where each pixel has a surface area equal to the total area under all three gates) will be forced to migrate toward the deepest potential well. When the exposure is terminated and CCD readout begins, the voltages applied to each gate are cycled (this process is called clocking the device) such that the charge stored within each pixel during the integration is electronically shifted. A simple change in the voltage potentials (V3 goes to +5 volts, while V1 becomes +10 volts and so on) allows the charge to be shifted in a serial fashion along columns from one CCD pixel to another throughout the array. The transfer of the total charge from location to location within the array is not without losses. As we will see, each charge transfer (one

1 The energy of a photon of a given wavelength (in electron volts) is given by E(eV) =

V2 V3

End of exposure

End of exposure

Charge transfer

Charge transfer

Vi V2 V3

Fig. 2.2. Schematic voltage operation of a typical three-phase CCD. The clock voltages are shown at three times during the readout process, indicating their clock cycle of 0, 10, and 5 volts. One clock cycle causes the stored charge within a pixel to be transferred to its neighboring pixel. CCD readout continues until all the pixels have had their charge transferred completely out of the array and through the A/D converter. From Walker (1987).

of which occurs for each voltage change or clock cycle) has an associated efficiency. This efficiency value is the percent of charge transferred compared with that which was actually collected. Modern values for the charge transfer efficiency (CTE) are approaching 0.999 999 (i.e., 99.9999% efficient) for each transfer.

Each column in the array is connected in parallel and thus each pixel shift is mimicked throughout the entire array simultaneously. One clock cycle moves each row of pixels up one column, with the top row being shifted off the array into what is called the output shift register or horizontal shift register. This register is simply another row of pixels hidden from view (i.e., not exposed to incident light) and serves as the transition between active rows on the array and the output of the device. Once an entire row is shifted into the output register, and before any further row shifts on the active area occur, each pixel in the output register is shifted out one at a time (in a similar manner as before) into the output electronics. Here, the charge collected within each pixel is measured as a voltage and converted into an output digital number (see Section 2.4). Each pixel's collected charge is sensed and amplified by an output amplifier. CCD output amplifiers are designed to have low noise and are built directly into the silicon circuitry; thus they are often referred to as on-chip amplifiers. These amplifiers must work with extremely small voltages and are rated, as to their sensitivity, in volts per electron. Typical values are in the range of 0.5 to 4 microvolts per electron. Figure 2.3 is a microphotograph of an actual CCD showing the various parts we just discussed. In addition, this CCD is an L3CCD (see below) and has an extended serial register the latter half of which is a gain register.

The output voltage from a given pixel is converted to a digital number (DN) and is typically discussed from then on as either counts or ADUs (analog-to-digital units). The amount of voltage needed (i.e., the number of

Fig. 2.3. Microphotograph of a E2V L3CCD (see Section 2.2.7) showing the image area (pixels), the serial register, and the on-chip readout amplifier. The other wiring and the bus wires are electrical connections that carry the clock signals and bias voltages to use. Added on to the normal CCD components is an extended serial register through which the readout occurs (the arrow indicates this flow) where the half after the bend is the gain register.

Fig. 2.3. Microphotograph of a E2V L3CCD (see Section 2.2.7) showing the image area (pixels), the serial register, and the on-chip readout amplifier. The other wiring and the bus wires are electrical connections that carry the clock signals and bias voltages to use. Added on to the normal CCD components is an extended serial register through which the readout occurs (the arrow indicates this flow) where the half after the bend is the gain register.

collected electrons or received photons) to produce 1 ADU is termed the gain of the device. We will discuss the gain of a CCD in Chapter 3 and here only mention a few items of interest about it. A typical CCD gain might be 10 electrons/ADU, which means that for every 10 electrons collected within a pixel, the output from that pixel will produce, on average, a count or DN value of 1. For example, with this gain value if a pixel collects 1000 electrons (photons), the output pixel value stored in the computer would be 100 ADUs. For 1500 electrons 150 ADUs would be produced and for 17 234 electrons, the output pixel value would be 1723 ADUs (note, not 1723.4). Digital output values can only be integer numbers and it is clear already that the discrimination between different pixel values can only be as good as the resolution of the gain and digital conversion of the device.

Conversion of the output voltage signal into a DN is performed within a device called an analog-to-digital converter (A/D or ADC). We will see later on that there is an intimate connection between the number of digital bits available in the A/D and the value of the gain that can or should be used for the CCD. The output DNs are usually stored initially in computer memory and then moved to disk for storage and later manipulation.

The process of shifting each entire CCD row into the output register, shifting each pixel along within this register, and finally performing the voltage conversion of each pixel's stored charge by the A/D to produce a DN value is continued until the entire array of pixels has been readout. For large-format CCD arrays, this process can take upwards of a few minutes to complete a single read out of the entire device. Note that for a 2048 x 2048 CCD, the charge collected in the last pixel to be read out has to be transferred over four thousand times. However, most modern large-format CCDs or mosaic cameras containing many large CCDs use a few tricks to readout faster. Single monolithic CCDs usually have 2 or 4 output amplifiers available (one in each corner) and given the proper electronic setup, these large chips are often read out from 2 or 4 corners simultaneously, thus decreasing the total readout time by 2-4. For a mosaic of CCDs, this same process can read the entire array (using multiple amplifiers on each CCD) much faster than even one single large CCD.

The array size of a single CCD, as well as the size of a given pixel on a device, is controlled by the current limitations of manufacturing. How large one can make a good quality, large-scale integrated circuit and how small one can make a MIS capacitor, both of which have demanding requirements for near perfect operation, set the scale of CCD and pixel sizes that are available. CCDs as large as 5040 x 10080 and 7168 x 9216 pixels and pixels as small as 2-10 microns have been successfully produced.

Modern CCDs have much higher processing standards than even five years ago. Items such as multi-layer registration on the silicon wafer on the photomasks used in the production of the CCD integrated circuit and the ability to make smaller electrical component parts on the wafers (such as output amplifiers) lead to much lower noise characteristics, better pixel charge manipulation, and the ability for faster readout speeds with lower noise. For example, better alignment of the CCD layers in each pixel allow lower clock voltages to be used (as low as 2 volts has been demonstrated) leading to lower overall power consumption. This fact, in turn, allows for items such as plastic packaging instead of ceramic, reducing overall packaging costs, a cost that often rivals that of the CCD itself.

As you might imagine, astronomy is not the driving force for CCD manufacturing. Video devices, cell phones, security cameras, Xerox machines, etc. are the global markets boosting the economy of CCD makers. The trend today is to produce CCDs with small pixels (10-12 microns for astronomy down to ~2 microns for other applications) in order to increase image resolution. Small pixels (and small CCDs) have lower cost and higher yield but the small pixels have shallow well depths. This is somewhat compensated for using fast readout techniques and/or microlens arrays, which focus light from an incoming source onto each small CCD pixel. Not all CCD pixels are desired to have shallow wells. The CCDs produced by E2V for the NASA Kepler Discovery mission have 27 micron pixels with well depths of nearly 1 million electrons each and a capacity of > 50 000 electrons per pixel is quite common in astronomy. Even CCDs with built-in electronic shutters are being experimented with. Each pixel contains a p+-n-p- vertical overflow drain (VOD) photodiode structure on its top through which the incoming light passes. The absorption of incoming light when the "shutter" is open is minimal and, within a few hundred nanoseconds, the electronic shutter can be biased and become opaque. The interested reader is referred to Janesick & Elliott (1992), Janesick (2001), Kang (2003), Robinson (1988a), and Appendix A for further details.

2.2 CCD types

When reading about CCDs, one of the most confusing issues can be the various terms listed in the literature or in commercial documents. Items such as backside illuminated, buried channel, deep depletion, and antiblooming are just a few. This section will provide a brief discussion to some of these terms while Chapter 3 will discuss CCD characteristics in detail. Further information can be found in the references listed in Appendix A. In particular, readers desiring a microscopic look at the electronic structures of a CCD integrated circuit are referred to Janesick (2001) and the many SPIE articles listed therein. Some terms, such as quantum efficiency and full well capacity, will be used here without proper introduction. This will be rectified in the next chapter.

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